JTAG (Joint Test Action Group, IEEE1149, Boundary Scan) is an interface used for programming and testing of multiple ICs on a PCB during manufacturing and development. The ICs need to be daisy chained, and the interface is especially useful for programming FPGAs.
Data rate
10-100Mbps
Duplex/Simplex
Daisy chained
Connector physical size(WxHxD)
No typical connector assigned for JTAG
PHY properties
5 wire + GND, single ended with master clock